Dr. Amitabha Chakrabarty
Professor, Department of Computer Science and Engineering, BRAC University
Email: amitabha@bracu.ac.bd
COMPUTER ARCHITECTURE
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Enrollment is Closed
General Information
| Course Code | CSE340 |
| Course Title | Computer Architecture |
| Credit Hours (Theory+Lab) | 3 + 0 |
| Contact Hours (Theory+Lab) | 3 + 0 |
| Category | Program Core |
| Type | Required, Engineering, Lecture |
| Soft Prerequisite | CSE260:Digital Logic Design |
| Co-requisites | None |
Course Objectives
-
Introduce different processor technologies, performance metrics and representation of numbers and
arithmetic operations -
Introduce RISC-V architecture, demonstrate its instruction formats, their data path designing process and
translation of simple C/Java code snippets to RISC-V assembly language - Teach how to recognize pipe lining hazards and different techniques for overcoming them
- Introduce and explain memory hierarchy and performance analysis
- Introduce parallel architecture and parallel programming
- Make aware of the importance and impact of energy-efficient computer architecture in environment
Course Assessment Methods
Assignment
Assignment shall be designed to ensure that the students have the required understanding of different architectures. Specifically, they will support the students’ learning progress.
Quizzes
Surprise Class Tests
Surprise Class Tests/ Quizzes will be designed to test the students' understanding in the course and to assess various course outcomes
Examinations
The exam shall contain problems designed to test knowledge and comprehension, to analyze control systems, and/or to apply the engineering problem solving method.
Textbook
- D.A. Patterson, J.L. Hennessy, Computer Organization and Design RISC-V Edition
Course Staff
Partha Bhoumik
Lecturer, Department of Computer Science and Engineering, BRAC University
Email: partha.bhoumik@bracu.ac.bd
Redowanul Akbar
Lecturer, Department of Computer Science and Engineering, BRAC University
Email: ext.redowanul.akbar@bracu.ac.bd